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Wafer Test

Chip Probe Test

A wafer test is a process where all the chips at wafer level are probed by testers dedicated to each IC to check whether a device’s functions and performance are consistent with the design specifications. In the process, general tests such as O/S and function checks are carried out to determine Pass/Fail results.

In this process, only good dies are selected and defected ones are labeled, for example by leaving ink dots on the surface of their chips, thereby being sidelined in the subsequent assembly processes. All these processes employ auto wafer probers so that most of the processes are performed automatically.
DDI Test System
DDI Test System
PMIC Test System
T2000-IPS / ETS-364B
CIS Test System
SoC Test System
Application Vendor Model Specification
(Pin mux, Pattern mux)
DDI Advantest T6372(ND2) 437.5MHz
T6373(ND3) 437.5MHz HSIF : 1.25GHz
T6391(ND4C) 800MHz UHSIF : 2.7GHz ~ 4.0GHz(License)
T6391S(ND4ST) 800MHz UHSIF : 4.0GHz ~ 6.5GHz(License)
Yokogawa TS670 UVI : 2.0A
ST6730A 375MHz NSIO
ST6731A 1.25GHz GSIO
PMIC Eagle ETS-364B 66MHz
Advantest T2000-IPS 250MBps
T2000-IPS/EPP 250Mbps/800Mbps/1Gbps
T2000-IPS 52TH 1Gbps GPWGD
CIS Advantest T2000-ISS/32 800Mbps 1.2G Capture Module
T2000-ISS/64P 1Gbps 4.8G Capture Module
SOC Teradyne Ultra-FLEX 1600Mbps

Re-configuration Process

We provide a process solution that allows a wafer level chip test while minimizing losses, for the cases where sorting issues are raised or Test Program Debugging needs to be retested for chips after the sawing process.

Re-Configuration & Test

<2200 evo- Key Features (Re-con)>